This invention relates to an interface circuit; and it relates, in particular, to one such circuit which is useful for interfacing a control signal bus with a variety of different types of controlled circuits.
In large communication systems, a central office includes plural types of message signal transmission circuits, each requiring different types of signal treatment, e.g., echo cancellation, equalization, and gain adjustment. There is also a constant need for cost savings, and they are often realized by automating different functions. In that connection, it is known that functions of various signal treatment circuits can be set, sometimes called provisioning, by electrical remote control means.
In a system for remotely controlling the provisioning of communication channel treatment units, the control and monitoring signal communication of a central processing unit (CPU) via a bus with various subscriber commuinication channel units (CU) must provide different types and amounts of control signals, some of which may be required at different times. A time-shared bus is often used for such signal communication between a CPU and the CU's, and different types of interface circuits are employed for different CU types. A corresponding inventory of different CU integrated circuit interface chip types is required. A universal interface can be achieved with, e.g., a microprocessor-controlled circuit approach; but that has excessive function power for a substantial range of applications, and so represents a pre-unit cost penalty for those applications. In addition, a microprocess-controlled circuit typically exhibits lower speed and higher power consumption than a custom interface circuit.
Some examples of prior interface arrangements are noted. A Lowell et al. U.S. Pat. No. 4,057,847 shows a test interface unit for computing systems, and which includes a keyboard to control the entry of signals received via a telephone line used as a data link from a remote data processing unit. In a Catiller et al. U.S. Pat. No. 4,293,909, a host computer is coupled to plural base modules, each of which has plural peripheral controllers. Each of the latter controllers includes an application-specific logic module, and each logic module includes a universal standardized microprocessor for controlling and handling data transfer functions between the host computer and the peripheral device. A Means et al. U.S. Pat. No. 4,373,183 shows a distributed control system in which bus interface units (BIU) control allocation of access by system elements to a common central bus. The BIU includes a central processing unit, a DMA arrangement, memory, etc. A Baun et al. U.S. Pat. No. 4,320,505 includes channel units which have gating and flip-flop logic provided to reduce information flow between a channel unit and a controller by preventing the transmission, for example, of single-bit errors and current status.